1. Field of the Invention
The invention relates to a write-acknowledge circuit comprising a write detector having two write inputs, two complementary inputs and an acknowledge output, and further comprising a bistable element having two inputs coupled to the respective write inputs of the write detector and having two outputs coupled crosswise to the respective complementary inputs of the write detector for supplying two complementary signals thereto in response to a write signal on one of the two write inputs.
2. Description of the Related Art
A write-acknowledge circuit of this type is known from FIG. 15 of published European Patent Specification No. 0 329 233, which corresponds to U.S. application Ser. No. 156,392, filed Feb. 16, 1988, now U.S. Pat. No. 5,005,136, issued Apr. 2, 1991, assigned to the present assignee. The Boolean value of a single variable is applied to both write inputs of the write-acknowledge circuit: to one write input the value "TRUE" and to the other write input the value "FALSE" is applied. This is also termed Double-Rail Encoding.
Producing an acknowledge signal in response to a write signal on a write input renders this write-acknowledge circuit extremely suitable for use in delay-insensitive circuits which operate at any combination of delays of individual gates and connections. In delay-insensitive circuits, communication takes place by means of changes in the signal values on the wires between the inputs and outputs (for example, the write inputs and acknowledge output of the write-acknowledge circuit). The delay-insensitivity is caused by the fixed-causality relations between the signal changes.
The disadvantage of Double-Rail Encoding is that two wires instead of one are necessary for transmitting the two possible signal values of a 1-bit variable. The use of two wires, however, is advantageous in that is provides an implicit reference; that is to say, the voltage on one wire is high relative to the voltage on the other wire and so the signal value of the variable is determined unambiguously. When using one wire there is no reference point and, consequently, voltage variations on the wire may affect the signal value of the variable. Voltage variations may, of course, also occur with Double-Rail Encoding, but since they then occur on the two wires at the same time, such voltage variations have little or no impact on the implicit reference value of the voltage between the two wires.
In the case of Double-Rail Encoding, the write-acknowledge circuit operation is independent of the clock frequency, as a result of which it is possible for the circuit to operate at a higher speed than if the circuit were actually dependent on the clock rate. It is true that the use of two wires does cost space. However, the circuits, components and wires necessary for driving with a clock are then no longer necessary. Thus, on the whole there may be a space saving effect.
Depending on which write input has the logic value "1", the variable has the Boolean value TRUE or FALSE. During a state of rest, the write signals on the write inputs have the same logic value (for example, "0"). When either one of the two write signals changes from the rest value "0" to the inverted logic value "1", the acknowledge signal on the acknowledge output will also change form "0" to "1". The acknowledge signal denotes that the write signal has been processed by the circuit and so the write signal may again assume the rest value. The acknowledge signal further denotes that a change has occurred in one of the write signals, but gives no information on the write input concerned. Subsequently, the state of rest is reverted to, resulting in that the acknowledge signal also returning to the original "0" logic value.
The above-described procedure is valid for the two write signals and is termed four-phase handshake signalling.
the write detector in the prior-art write-acknowledge circuit requires ten transistors. An object of the present invention is to provide a write detector comprising fewer transistors.